XOR operation can be achieved with a combination of different logic gates. It can be implemented into any Logic function. Some of XOR IC with pin configurations is given below. According to the truth table given above, Product of sum expression and schematic for 3-input XOR gate is given below. Otherwise either if both the inputs are false (0) or if both are true (1) then a false output (0) is received as a resultant. In this schematic 4 diodes are used in a bridge configuration for sorting out input logic. « Make Money from your own Article GSM Services and Features », © 2020 Our Education | Best Coaching Institutes Colleges Rank | Best Coaching Institutes Colleges Rank, I am Passionate Content Writer. What is Power Electronics? So if we consider the expression , we can construct an XOR logic gate circuit directly using AND, OR and NOT logic gates.

OUT     =    (I̅N̅1̅ & I̅N̅2̅ & IN3)  +  (IN1 & I̅N̅2̅ & I̅N̅3̅)  +  (I̅N̅1̅ & IN2 & I̅N̅3̅)  +  (IN1 & IN2 & IN3). Your email address will not be published. The resistor between Diode Bridge and 1st MOSFET is used in parallel configuration because MOSFETs operates on Gate’s voltages, not current. I am fun Loving Person and Believes in Spreading the Knowledge among people. In this expression, we use the sum of Min terms. NAND gate is a universal gate. It is implemented as an Exclusive OR gate in which a true output (1) is received as the resultant output if one of the inputs to the logic gate is true (1). Combinational logic is the logic of making a schematic with the help of basic logic gates.

OUT’       =       { (I̅N̅1 & IN2)’ & (IN1 & I̅N̅2)’ }, OUT’        =         { (I̅N̅1̅ + I̅N̅2̅)’ + (IN1 + IN2)’ }. According to the truth table given above, Sum of product expression and schematic for 3-input XOR gate is given below. Otherwise either if both the inputs are false (0) or if both are true (1) then a false output (0) is received as a resultant.
For 2-input gate it can be interpreted as “when both of the inputs are different, then the output is HIGH state ‘1’ and when the inputs are same, then the output is LOW state ‘0’”. And can easily be implemented with NAND gates as shown in the figure below. OUT = ( I̅N̅1 & IN2) + (IN1 & I̅N̅2)       or      OUT = (I̅N̅1 + I̅N̅2) & (IN1 + IN2) ; Schematic of XOR gate using Diodes and BJT (NPN transistor) is given below.

NANDNORUniversal GateXORXOR Gate using NAND Gate.

The diodes are used in a bridge configuration (Rectifier) to sort out the input logic into the positive level, means if there is a High state input it will always flow to the base of NPN to switch it on. Max terms are the sum of inputs for which output is LOW state “0”. Some common application and uses of XOR or Exclusive-OR gate are as follow: You may also read more about Digital logic gates. XOR gate is used extensively in error detection circuits, computational logic comparators and arithmetic logic circuits. According to the truth table given above the POS (product of sum) expression is : OUT        =        (I̅N̅1̅+I̅N̅2̅) & (IN1+IN2)            Expression 1, OUT        =        (IN1 & IN2)’ & (IN1+IN2)         Expression 2                DE MORGAN’S LAW. This gate is a special type of gate used in different types of computational circuits. state “0”, again there will be no potential (voltage) at the gate of NMOSFET so it will never turn ON and Vdd will flow out to the inverter and inverts into LOW state “0” as output. OUT     =    (I̅N̅1̅ & I̅N̅2̅ & IN3)  +  (IN1 & I̅N̅2̅ & I̅N̅3̅)  +  (I̅N̅1̅ & IN2 & I̅N̅3̅)  +  (IN1 & IN2 & IN3), of max terms (Sum of inputs for which output is LOW.). if both are HIGH state “1” than the HIGH state will flow to the gate of NMOSFET but there will be no potential at its source so NMOSFET will switch OFF.

Whereas the OR function is equivalent to Boolean addition, the AND function to Boolean multiplication, and the NOT function (inverter) to Boolean complementation, there is no direct Boolean equivalent for Exclusive-OR. The XOR gate stands for the Exclusive-OR gate. XOR gate gives HIGH state “1” only when there is an odd number of HIGH state “1” inputs. If it’s HIGH state “1” then the NPN will turn on but there will be no Logic 0 to flow through the emitter. Dec 6 • General • 1883 Views • No Comments on XOR Logic Gate using Other Logic Gate. Up tp 93% Off - Launching Official Electrical Technology Store - Shop Now!

Like for example a circuit implementing an XOR function can be trivially constructed from an XNOR gate which is followed by a NOT gate. One element conspicuously missing from the set of Boolean operations is that of Exclusive-OR, often represented as XOR. Combinational logic is the logic of making a schematic with the help of basic logic gates. In XOR operation, the output is only 1 when only one input is 1. It only inverts the output of the first NPN transistor. As a Boolean equivalency, this rule may be helpful in simplifying some Boolean expressions. When both of the inputs are same i.e. XOR schematic using N-MOSFETs and diodes is given below. XOR gate can have two or more than two inputs but it has only one output. The resistor between Diode Bridge and 1st MOSFET is used in parallel configuration because MOSFETs operates on Gate’s voltages, not current. And the LOW state will flow out to the inverter and inverts into HIGH state “1”.

XOR gate represents the inequality function in which the output is HIGH (1) if the inputs are not alike otherwise the output is LOW (0) if not alike. Converting Truth Tables into Boolean Expressions, Sum-of-Products and Product-of-Sums Expressions Worksheet, All About Circuits Opens Registration for Industry’s Largest Virtual Trade Show, Introduction to Stepper Motors with Trinamic’s TMC2130 Eval Kit, Active Rectifier Circuits: Convert Alternating Current to Direct Current. An XOR gate (sometimes referred to by its extended name, Exclusive OR gate) is a digital logic gate with two or more inputs and one output that performs exclusive disjunction.

Sum of products (SOP) and products of the sum (POS) are two methods in combinational logic. As a result, the XOR gates are used to implement the binary addition in computers. Sum of products (SOP) and products of the sum (POS) are two methods in combinational logic. It performs exclusive disjunction. POS uses the idea of the product of max terms (Sum of inputs for which output is LOW.) 25% Off on Electrical Engineering Shirts. There are 3 types of symbols used for XOR gate all over the world. The output of an XOR gate is true only when exactly one of its inputs is true . Power vs Linear Electronics and Applications, 74136 Quad 2-input (with open collector outputs). The below table shows the four commonly used methods for expressing the X-NOR operation. SOP uses the idea of summation of minterms (product of inputs for which output is high) According to the truth table given above, Sum of product expression and schematic for 3-input XOR gate is given below. Please consider supporting us by disabling your ad blocker. XOR operation can be achieved with a combination of different logic gates.

2 NMOSFETs are used; 1st one for switching upon input logic and the 2nd one for Inverting output of 1st NMOSFET. It only inverts the output of, Discrete XOR gate can be made with MOSFETs and diodes. An XOR logic gate circuit can be made from four NAND or five NOR logic gates as in the configurations shown below. EE-Tools, Instruments, Devices, Components & Measurements, Electrical & Electronics Notes and Articles, XOR Gate From other Logic Gates: (Combinational Logic), Logic NOT Gate – Digital Inverter Logic Gate, Clap Switch Circuit Using IC 555 Timer & Without Timer, Difference between Star and Delta Connections – Comparison Of Y/Δ, Traffic Light Control Electronic Project using IC 4017 & 555 Timer, Basic Electrical & Electronics Interview Questions & Answers. The Exclusive OR gate gives an output only if its two inputs are dissimilar, namely if one of them is high (one) and the other is low (zero). It can be implemented into any Logic function. In fact, both the NAND logic gates and NOR logic gates are also called “universal gates” and any logical function can be constructed from either of the NAND logic gate or NOR logic gate. Hence Vdd (HIGH state “1”) will flow to the inverter and inverts into LOW state “0” as output.

A half adder consists of an XOR gate and an AND Gate. XOR gate can have more than two inputs but it has only one output. Hence Vdd (HIGH state “1”) will flow to the inverter and inverts into LOW state “0” as output. As we have discussed before POS (product of sum) expression can be easily implemented with NOR gates, so POS expression for XOR gate is given below, OUT         =        { (I̅N̅1̅ + I̅N̅2̅) & (IN1 + IN2) }, OUT’        =        { (I̅N̅1̅ + I̅N̅2̅) & (IN1 + IN2) }’                      Taking complement on both sides, OUT’        =         { (I̅N̅1̅ + I̅N̅2̅)’ + (IN1 + IN2)’ }                     De Morgan’s Law, OUT’’        =        { (I̅N̅1̅ + I̅N̅2̅)’ + (IN1 + IN2)’ }’                    Taking complement on both sides, OUT         =         [ { (IN1 + IN1)’ +(IN2 + IN2)’ }’ + (IN1 + IN2)’]’ (IN1 + IN1)’ = I̅N̅1. So Vcc will flow out to the inverter phase and it will invert into Low state “0” as output. If you still have any query, face any problem or have some suggestions regarding this post, please feel free to share it with us in the comment box below. When both of the inputs are same i.e. Main Difference Between Electrical and Electronic Engineering? Your email address will not be published. NOR gate is also a universal gate. Best IAS Coaching Institutes in Coimbatore. I also have done MBA from MICA. I hope I was able to clear out this topic to you. Create one now. When the inputs are same, if it’s LOW state “0” then NPN will never turn on because there be no HIGH state input at its base. When both inputs are. Now, this expression is in NAND form.

If a specific type of gate is not available, then a circuit that implements the same function can be constructed from the other available gates also. And can easily be implemented with NOR gates as shown in the figure below.

Limited Edition... Book Now Here. Expression 1 can be implemented with NOT, AND, OR gates as shown in the figure given below. Expression 1 can be implemented with NOT, AND, OR gates as shown in the figure given below.

SOP expression can be easily implemented with NAND gates. As we have discussed before SOP (sum of product) expression can be easily Implemented with NAND gates, so SOP expression for XOR gate is, OUT        =        { (I̅N̅1 & IN2) + (IN1 & I̅N̅2) }, OUT’       =       { (I̅N̅1 & IN2) + (IN1 & I̅N̅2) }’                    Taking complement on both sides, OUT’       =       { (I̅N̅1 & IN2)’ & (IN1 & I̅N̅2)’ }                   De Morgan’s Law, OUT’’      =       { (I̅N̅1 & IN2)’ & (IN1 & I̅N̅2)’ }’                  Taking complement on both sides, OUT       =      [ { (IN1 & IN1)’ & IN2}’ & { IN1 & (IN2 & IN2) }’ ]’   (IN1 & IN1)’   =    I̅N̅1.
And the Low state will always flow out to the emitter of NPN transistor.

XNOR gate is a NOT gate followed by an XOR gate. This is the main principle in the half adder and the combined AND – XOR circuit may be chained together in order to add ever longer binary numbers. The XOR gate is a digital logic gate. The XOR gate can also be viewed as an addition modulo 2. And the second NPN transistor is nothing more than just an Inverter. One element conspicuously missing from the set of Boolean operations is that of Exclusive-OR, often represented as XOR. What expression can be replaced by a single Exclusive-OR gate? The XOR logic gate can be used as a one – bit adder. The LOW state “0” flow through the emitter to the base of the 2nd NPN transistor and inverts into Logic HIGH state “1” as output. These gates are not basic gates in their own and are constructed by combining with other logic gates. POS expression can be easily implemented with NOR gates.